13#ifndef KERNEL_DEVICES_PCI_H
14#define KERNEL_DEVICES_PCI_H
16#include <kernel/devices/driver.h>
18#include <kernel/pci.h>
20#include <utils/container_of.h>
22#define PCI_DEVICE_ID(_vendor, _device) \
23 ((pci_device_id_t){.vendor = _vendor, .device = _device})
55#define PCI_BAR_MAX_COUNT 6
70#define to_pci_drv(_this) container_of(_this, struct pci_driver, driver)
71#define to_pci_bus(_this) container_of(_this, struct pci_bus, this)
72#define to_pci_dev(_this) container_of(_this, struct pci_device, device)
76#define DECLARE_PCI_DRIVER(_name, _driver) \
77 DECLARE_DRIVER(_name, _driver, pci_driver_register)
99static inline void pci_device_write_config(
struct pci_device *pdev,
100 uint8_t offset,
size_t size,
103 pci_write_config(pdev->
bus->
number, pdev->
number, offset, size, value);
106static inline uint32_t
107pci_device_read_config(
struct pci_device *dev, uint8_t offset,
size_t size)
#define PCI_BAR_MAX_COUNT
Data passed to the interrupt routine.
Definition: pci.h:55
u32(* interrupt_handler)(void *)
Function pointer to an interrupt handler.
Definition: interrupts.h:38
void pci_device_enable_bus_master(struct pci_device *, bool)
Enable/Disable a device's ability to perform bus-master operations.
Definition: pci.c:93
error_t pci_device_register_interrupt_handler(struct pci_device *, interrupt_handler, void *data)
Register a custom interrupt handler function for this device.
Definition: pci.c:229
error_t pci_device_register(struct pci_device *)
Register a PCI device.
Definition: pci.c:107
void pci_device_enable_memory(struct pci_device *, bool)
Enable/Disable a device's response to memory space accesses.
Definition: pci.c:86
void pci_device_enable_io(struct pci_device *, bool)
Enable/Disable a device's response to I/O space accesses.
Definition: pci.c:79
The basic device driver structure.
Definition: driver.h:77
Represents a device inside the kernel.
Definition: device.h:78
Intrusive doubly-linked list node.
Definition: linked_list.h:27
A PCI bus.
Definition: pci.h:34
struct pci_bus * parent
The parent bus (NULL if this is the root bus)
Definition: pci.h:37
uint8_t number
The bus's number.
Definition: pci.h:36
PCI Base Address Registers.
Definition: pci.h:58
size_t size
The address register's size.
Definition: pci.h:61
paddr_t phys
The BAR's "true" physical or IO address.
Definition: pci.h:60
pci_bar_type
The type of the Address Register.
Definition: pci.h:63
@ PCI_BAR_IO
IO memory.
Definition: pci.h:65
@ PCI_BAR_MEMORY
Physical memory (either 32 or 64b)
Definition: pci.h:64
void * data
Addressable virtual address mapped to the register.
Definition: pci.h:59
Per-bus device struct for PCI devices.
Definition: pci.h:43
u8 number
The device number on its bus.
Definition: pci.h:47
pci_device_id_t id
The PCI device's vendor/device ID.
Definition: pci.h:49
interrupt_handler interrupt_handler
The interrupt handler routine.
Definition: pci.h:52
u8 interrupt_line
The PIC interrupt number used by the PCI device.
Definition: pci.h:51
struct pci_bus * bus
The bus to which the device is connected.
Definition: pci.h:48
Per-bus driver struct for PCI drivers.
Definition: pci.h:28
ID header format.
Definition: pci.h:27